Design Verification Engineer

Qorvo (Nasdaq: QRVO) supplies innovative semiconductor solutions that make a better world possible. We combine product and technology leadership, systems-level expertise and global manufacturing scale to quickly solve our customers' most complex technical challenges. Qorvo serves diverse high-growth segments of large global markets, including consumer electronics, smart home/IoT, automotive, EVs, battery-powered appliances, network infrastructure, healthcare and aerospace/defense. Visit www.qorvo.com to learn how our diverse and innovative team is helping connect, protect and power our planet.

ABOUT THE POSITION:

Are you interested in world-class products and future-oriented projects in the field of chip design? Then Qorvo is the right choice!

Qorvo’s Power Management team designs a broad range of products which include Power Management Units (PMUs) for various applications such as Smartphones, notebooks, Solid State Drive, Digital Camera, IoT and wearable devices to battery management ( linear and switching chargers for different battery types) which is a System on Chip that focus on high-efficiency motor controller for wide range of application such as home appliances, whitegoods, power tools, garden tools, drones.

Design Verification Engineer works closely with digital & analog design engineers to verify the digital core of the PMUs, High power DC-DC and the SoC.

RESPONSIBILITIES

• Understand the requirements & the functional description of the device to ensure compliance with specifications and error-free functionality.
• Develop a digital circuit with System Verilog/Verilog for a new design or update the functions of an existing design of the circuit.
• Create a detailed block design using System Verilog/Verilog from the functional requirement, evolve design specification and perform RTL coding and Lint checking.
• Create and execute a verification plan, including verification testbench/patterns/models/System Verilog Assertions (SVAs). 
• Develop SVA properties for assertion, assumption and cover statement.
• Debug failures, fix testbench/model/checker issues, analyze and close coverage.
• Write scripts for automation of flow.
• Work with Analog team members to bring up Chip/System level verification.  
• Participate in post-silicon bring-up, validation and compliance testing.

REQUIREMENT/ QUALIFICATION

• Bachelor or Graduate Degree in Computer Sciences, Electrical, or Computer Engineering.
• Have at least 2-5 years of proven experience
• Experience with Hardware Descriptive Languages (HDL) such as System Verilog, Verilog or VHDL is required.
• Understand digital hardware architectures and logic (State-machines, RAMs, Registers and bus architectures such as SPI or I2C).
• Must be self-driven & proactive with a desire to understand, learn more, do more.
• Excellent analytical and debugging skills with the ability to proactively solve issues is required.
• Verbal and written communication skills in English.
• Good understanding of ASIC design and verification methodologies/flows is a plus.
• Knowledge of verification methodologies such as UVM is a plus.
• The ability to work in a Linux shell environment and Linux scripting (CSH/TCL/Perl/Python) is a plus.
• Experience with silicon debugging which includes logic and Analog Blocks working together is a plus.

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MAKE A DIFFERENCE AT QORVO  

We are Qorvo. We do more than create innovative RF and Power solutions for the mobile, defense and infrastructure markets – we are a place to innovate and shape the future of wireless communications. It starts with our employees. As a unified global team, we bring a commitment to excellence, growth and a passion for creating what's next. Explore the possibilities with us.