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Silicon Technology Lead Engineer

Experience Level:  Individual Contributor
Job Type:  Full-Time
Location: 

Ireland - Dublin, IE

Requisition ID:  2178

About Qorvo

 

Be a part of a team that’s delivering a new tomorrow. Qorvo manufactures innovative RF solutions at the center of connectivity to enable high-performance applications for advanced wireless devices, wired and wireless networks and defense radar and communications for 5G networks, cloud computing, the Internet of Things, and other emerging applications. We are a global company thriving on a culture of innovation, diversity, and inclusion. Our people are always at the core of Qorvo’s innovation. Qorvo is a place to stretch your imagination and push boundaries to achieve success.

 

Decawave is a pioneer in ultra-wideband (UWB) technology and provider of UWB solutions for mobile, automotive and IoT applications. Decawave was founded in 2007 and has deployed more than 8 million chipsets in more than 40 different market verticals – from smartphones to drones. In February 2020 the company became part of Qorvo and with that the Ultra-Wideband Business Unit (UWBU) within Qorvo Mobile Products

 

 

SUMMARY
 
We seek a Silicon Technology Lead Engineer to work with solution architects and radio designers within the advanced technology development team with responsibility in the areas of new circuit and technology introduction for next generation products.     
You will be responsible for leacing a cross-functional team to deliver the next generation circuits and architectures from process node feasibility and concepts through to IC circuit specification and implementation..  
 

MAIN GOALS
 

  • Technical leadership for the delivery of high quality next generation mixed signals ICs using industry best practice methods for design, verification and test 
  • Actively support applications engineering & sales teams to increase revenue 
  •  Mentor junior engineers and to share IC skills/experience with other members of the team 
     

RESPONSIBILITIES
 
Design:  

  • Work with technology and radio architects to implement the technology plan by managing and leading a cross functional advanced development team
  • Familiar with advanced circuit architectures and techniques
  • Drives technology process feasibility and business requirements impact
  • Familiar with device level performance specifications and characterization, DOE design and analysis
  • Maintain the IC specification and supporting documentation 
  • Drive the IC floorplan, package, IO ring. ESD strategy and top-level power management 
  • Work with teams from all disciplines (analog, digital, backend, packaging)  
  • Ensure the IC follows best practice for design and testability (DFM, DFT, production test access etc.) 
  • Interface with the Physical Designer to hand off the synthesised netlist and constraints, and to iterate through layout, floorplan and design changes needed to close post-layout timing. 
  • Ensure that designs follow industry standard design flows, verification techniques, 
  • Create the necessary design and product documentation. 
  • Drive Design reviews and tapeout signoff meetings for spec compliance 

Test:  

  • Assist in the development of the IC test suite (Package test, wafer probe, HTOL, Latch-up, ESD) 
  • Execute plans and develops test procedures 
  • Actively participate in silicon bring-up and characterisation testing

Teamwork/Interpersonal:

  • Works with the Solution and Radio architects
  • Work with the project managers and the IC design team to ensure the IC design is executed to plan 
  • Interact with other engineers in systems, RF/analog subsystems to ensure ICs are delivered to meet or exceed specifications, on time and where applicable within budget. 


 
QUALIFICATIONS

  • Minimum Bachelor of Science in Electronic Engineering or related field and 15+ years of experience in relevant product development
  • Experience in successful and timely project/product development and release.
  • Familiarity with different foundries and process capabilities
  • Familiarity with device level performance specifications.
  • Experience in the complete digital ASIC Design flow, from specification, frontend RTL Design, Verification, STA (static timing analyse) through DFT and physical implementation 
  • Experience in the complete analog ASIC Design flow, from specification, schematic entry, layout, post-layout simulation. 
  • Excellent understanding of IC design flow and key productivity / performance metrics 
  • Experience in multiple high volume tape-outs  
  • Experience in low power IC modelling and design techniques 
  • Experience in IP Evaluation and selection, Analog/Digital partitioning in mixed-signal systems 
  • Experienced in die-size estimation and modelling the trade-offs between functionality and die-size and package selection would be an advantage 
  • Familiarity with designing on nodes of CMOS 40nm or less 
  • Excellent problem solving and analytical skills 
  • Excellent communications skills and ability to work on own initiative to come up with innovative solutions 

 

MAKE A DIFFERENCE AT QORVO  

 

We are Qorvo. We do more than create innovative RF solutions for the mobile, defense and infrastructure markets – we are a place to innovate and shape the future of wireless communications. It starts with our employees. As a unified global team, we bring a commitment to excellence, growth and a passion for creating what's next. Explore the possibilities with us.


 

Qorvo is an E-Verify Employer. For more information, please see the Right to Work and E-Verify Participation posters.

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