Share this Job
Apply now »

Senior ASIC Layout Design Engineer

Experience Level:  Individual Contributor
Job Type:  Full-Time
Location: 

Ireland - Dublin, IE

Requisition ID:  2307

About Qorvo

Be a part of a team that’s delivering a new tomorrow. Qorvo manufactures innovative RF solutions at the center of connectivity to enable high-performance applications for advanced wireless devices, wired and wireless networks and defense radar and communications for 5G networks, cloud computing, the Internet of Things, and other emerging applications. We are a global company thriving on a culture of innovation, diversity, and inclusion. Our people are always at the core of Qorvo’s innovation. Qorvo is a place to stretch your imagination and push boundaries to achieve success.

 

Decawave is a pioneer in ultra-wideband (UWB) technology and provider of UWB solutions for mobile, automotive and IoT applications. Decawave was founded in 2007 and has deployed more than 8 million chipsets in more than 40 different market verticals – from smartphones to drones. In February 2020 the company became part of Qorvo and with that the Ultra-Wideband Business Unit (UWBU) within Qorvo Mobile Products.

 

SUMMARY 

As Senior ASIC Layout Design Engineer, you will work as part of a cross-functional team to deliver the next generation UWB products from concept to volume production.  

 

RESPONSIBILITIES

Layout Design & Verification 

  • Work with Analog/RF Design Engineers to optimise the design and layout of complex RF and mixed signal blocks 
  • Work on block level and full top-level floor planning 

 

Interpersonal 

  • Interact with other engineers in the analog RF design team to ensure designs are delivered to specifications and on time. 
  • Produce high quality RF/Analog systems using industry best practice methods for layout and physical verification. 

 

QUALIFICATIONS 

  • Minimum Bachelor of Science in Electronic Engineering or related field and 6+ years of experience in relevant product development preferred. 
  • Good working knowledge of the Cadence Virtuoso suite and Calibre verification tools 
  • Experience of layout on advanced CMOS nodes (40nm and lower) 
  • Must understand issues of isolation, matching, parasitic effects, EM and IR drop 
  • Verification checks (DRC/LVS) 
  • Good problem-solving skills 
  • Good communication skills. 
  • Experience writing Skill code a plus 
  • Experience with high frequency RF designs is desired 

MAKE A DIFFERENCE AT QORVO  

 

We are Qorvo. We do more than create innovative RF solutions for the mobile, defense and infrastructure markets – we are a place to innovate and shape the future of wireless communications. It starts with our employees. As a unified global team, we bring a commitment to excellence, growth and a passion for creating what's next. Explore the possibilities with us.


 

Qorvo is an E-Verify Employer. For more information, please see the Right to Work and E-Verify Participation posters.

Apply now »